History log of /u-boot/arch/Kconfig
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# ab3453e7 10-Apr-2024 Tom Rini <trini@konsulko.com>

Merge patch series "Complete decoupling of zboot logic from commands"

Simon Glass <sjg@chromium.org> says:

This series refactors the zboot code to allow it to be used with
CONFIG_COMMAND disabled.

A new zboot_run() function is used to boot a zimage.


# 80d4c987 03-Dec-2023 Simon Glass <sjg@chromium.org>

x86: zboot: Create a separate ZBOOT option for zboot logic

Most of the functionality of zboot is contained in the logic which
handles a zimage. Create a separate Kconfig for the logic so that it can
(later) be used without the command itself being enabled.

Enable ZBOOT by default on x86, with the command depending on that. The
existing 'imply' can therefore be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 24c4ac84 04-Mar-2024 Dan Carpenter <dan.carpenter@linaro.org>

Kconfig: move CONFIG_32/64BIT to arch/Kconfig

These configs are used in multiple places so put them in a shared
Kconfig file.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 3dd14868 22-Jan-2024 Tom Rini <trini@konsulko.com>

Kconfig: Centralize prompting for SYS_CONFIG_NAME

Generally speaking, we do not prompt for this value and define it in the
board specific Kconfig file. There are some valid use cases however
today where we do prompt for this value, so instead of having this be
done in a number of locations, do this at the top-level location only.

This removes the question from a number of other locations and makes it
consistent that when we do set the value directly, we always do it the
same way. We don't need to specify the type, it's always string.

Signed-off-by: Tom Rini <trini@konsulko.com>

# db04ff42 10-Jan-2024 Tom Rini <trini@konsulko.com>

mtd: Make CONFIG_MTD be the gate symbol for the menu

The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>

# b17e280b 19-Dec-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

riscv: allow usage of ACPI

Select CONFIG_SUPPORT_ACPI to allow usage of ACPI tables with RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b630f8b3 27-Oct-2023 Tom Rini <trini@konsulko.com>

scsi: Forceably finish migration to DM_SCSI

The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).

With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 512369a7 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Avoid requiring CMDLINE

Add some dependencies on features that we had been selecting so that we
can still disable CMDLINE.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 909b15ca 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Disable CONFIG_DISTRO_DEFAULTS

This is not used for sandbox, so drop it. Enable the things that it
controls to avoid dstrastic changes in the config settings for
sandbox builds.

The end result is that these are enabled:

BOOTMETH_DISTRO
BOOTSTD_DEFAULTS

and these are disabled:

USE_BOOTCOMMAND
BOOTCOMMAND (was "run distro_bootcmd")
DISTRO_DEFAULTS

Note that the tools-only build has already disabled DISTRO_DEFAULTS
and BOOTSTD_FULL

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 04291ee0 08-Oct-2023 Alexander Gendin <agendin@matrox.com>

cmd: mbr: Allow 4 MBR partitions without need for extended

Current code allows up to 3 MBR partitions without extended one.
If more than 3 partitions are required, then extended partition(s)
must be used.
This commit allows up to 4 primary MBR partitions without the
need for extended partition.

Add mbr test unit. In order to run the test manually, mmc6.img file
of size 12 MiB or greater is required in the same directory as u-boot.
Test also runs automatically via ./test/py/test.py tool.
Running mbr test is only supported in sandbox mode.

Signed-off-by: Alex Gendin <agendin@matrox.com>
[ And due to some further changes for testing ]
Signed-off-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 This contributor prefers not to receive mails <noreply@example.com>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 24c4ac84 04-Mar-2024 Dan Carpenter <dan.carpenter@linaro.org>

Kconfig: move CONFIG_32/64BIT to arch/Kconfig

These configs are used in multiple places so put them in a shared
Kconfig file.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 3dd14868 22-Jan-2024 Tom Rini <trini@konsulko.com>

Kconfig: Centralize prompting for SYS_CONFIG_NAME

Generally speaking, we do not prompt for this value and define it in the
board specific Kconfig file. There are some valid use cases however
today where we do prompt for this value, so instead of having this be
done in a number of locations, do this at the top-level location only.

This removes the question from a number of other locations and makes it
consistent that when we do set the value directly, we always do it the
same way. We don't need to specify the type, it's always string.

Signed-off-by: Tom Rini <trini@konsulko.com>

# db04ff42 10-Jan-2024 Tom Rini <trini@konsulko.com>

mtd: Make CONFIG_MTD be the gate symbol for the menu

The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>

# b17e280b 19-Dec-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

riscv: allow usage of ACPI

Select CONFIG_SUPPORT_ACPI to allow usage of ACPI tables with RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b630f8b3 27-Oct-2023 Tom Rini <trini@konsulko.com>

scsi: Forceably finish migration to DM_SCSI

The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).

With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 512369a7 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Avoid requiring CMDLINE

Add some dependencies on features that we had been selecting so that we
can still disable CMDLINE.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 909b15ca 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Disable CONFIG_DISTRO_DEFAULTS

This is not used for sandbox, so drop it. Enable the things that it
controls to avoid dstrastic changes in the config settings for
sandbox builds.

The end result is that these are enabled:

BOOTMETH_DISTRO
BOOTSTD_DEFAULTS

and these are disabled:

USE_BOOTCOMMAND
BOOTCOMMAND (was "run distro_bootcmd")
DISTRO_DEFAULTS

Note that the tools-only build has already disabled DISTRO_DEFAULTS
and BOOTSTD_FULL

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 04291ee0 08-Oct-2023 Alexander Gendin <agendin@matrox.com>

cmd: mbr: Allow 4 MBR partitions without need for extended

Current code allows up to 3 MBR partitions without extended one.
If more than 3 partitions are required, then extended partition(s)
must be used.
This commit allows up to 4 primary MBR partitions without the
need for extended partition.

Add mbr test unit. In order to run the test manually, mmc6.img file
of size 12 MiB or greater is required in the same directory as u-boot.
Test also runs automatically via ./test/py/test.py tool.
Running mbr test is only supported in sandbox mode.

Signed-off-by: Alex Gendin <agendin@matrox.com>
[ And due to some further changes for testing ]
Signed-off-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 This contributor prefers not to receive mails <noreply@example.com>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# db04ff42 10-Jan-2024 Tom Rini <trini@konsulko.com>

mtd: Make CONFIG_MTD be the gate symbol for the menu

The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>

# b17e280b 19-Dec-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

riscv: allow usage of ACPI

Select CONFIG_SUPPORT_ACPI to allow usage of ACPI tables with RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b630f8b3 27-Oct-2023 Tom Rini <trini@konsulko.com>

scsi: Forceably finish migration to DM_SCSI

The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).

With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 512369a7 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Avoid requiring CMDLINE

Add some dependencies on features that we had been selecting so that we
can still disable CMDLINE.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 909b15ca 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Disable CONFIG_DISTRO_DEFAULTS

This is not used for sandbox, so drop it. Enable the things that it
controls to avoid dstrastic changes in the config settings for
sandbox builds.

The end result is that these are enabled:

BOOTMETH_DISTRO
BOOTSTD_DEFAULTS

and these are disabled:

USE_BOOTCOMMAND
BOOTCOMMAND (was "run distro_bootcmd")
DISTRO_DEFAULTS

Note that the tools-only build has already disabled DISTRO_DEFAULTS
and BOOTSTD_FULL

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 04291ee0 08-Oct-2023 Alexander Gendin <agendin@matrox.com>

cmd: mbr: Allow 4 MBR partitions without need for extended

Current code allows up to 3 MBR partitions without extended one.
If more than 3 partitions are required, then extended partition(s)
must be used.
This commit allows up to 4 primary MBR partitions without the
need for extended partition.

Add mbr test unit. In order to run the test manually, mmc6.img file
of size 12 MiB or greater is required in the same directory as u-boot.
Test also runs automatically via ./test/py/test.py tool.
Running mbr test is only supported in sandbox mode.

Signed-off-by: Alex Gendin <agendin@matrox.com>
[ And due to some further changes for testing ]
Signed-off-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 This contributor prefers not to receive mails <noreply@example.com>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# b17e280b 19-Dec-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

riscv: allow usage of ACPI

Select CONFIG_SUPPORT_ACPI to allow usage of ACPI tables with RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b630f8b3 27-Oct-2023 Tom Rini <trini@konsulko.com>

scsi: Forceably finish migration to DM_SCSI

The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).

With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 512369a7 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Avoid requiring CMDLINE

Add some dependencies on features that we had been selecting so that we
can still disable CMDLINE.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 909b15ca 26-Oct-2023 Simon Glass <sjg@chromium.org>

sandbox: Disable CONFIG_DISTRO_DEFAULTS

This is not used for sandbox, so drop it. Enable the things that it
controls to avoid dstrastic changes in the config settings for
sandbox builds.

The end result is that these are enabled:

BOOTMETH_DISTRO
BOOTSTD_DEFAULTS

and these are disabled:

USE_BOOTCOMMAND
BOOTCOMMAND (was "run distro_bootcmd")
DISTRO_DEFAULTS

Note that the tools-only build has already disabled DISTRO_DEFAULTS
and BOOTSTD_FULL

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 04291ee0 08-Oct-2023 Alexander Gendin <agendin@matrox.com>

cmd: mbr: Allow 4 MBR partitions without need for extended

Current code allows up to 3 MBR partitions without extended one.
If more than 3 partitions are required, then extended partition(s)
must be used.
This commit allows up to 4 primary MBR partitions without the
need for extended partition.

Add mbr test unit. In order to run the test manually, mmc6.img file
of size 12 MiB or greater is required in the same directory as u-boot.
Test also runs automatically via ./test/py/test.py tool.
Running mbr test is only supported in sandbox mode.

Signed-off-by: Alex Gendin <agendin@matrox.com>
[ And due to some further changes for testing ]
Signed-off-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 This contributor prefers not to receive mails <noreply@example.com>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 04291ee0 08-Oct-2023 Alexander Gendin <agendin@matrox.com>

cmd: mbr: Allow 4 MBR partitions without need for extended

Current code allows up to 3 MBR partitions without extended one.
If more than 3 partitions are required, then extended partition(s)
must be used.
This commit allows up to 4 primary MBR partitions without the
need for extended partition.

Add mbr test unit. In order to run the test manually, mmc6.img file
of size 12 MiB or greater is required in the same directory as u-boot.
Test also runs automatically via ./test/py/test.py tool.
Running mbr test is only supported in sandbox mode.

Signed-off-by: Alex Gendin <agendin@matrox.com>
[ And due to some further changes for testing ]
Signed-off-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 26af162a 26-Aug-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>

arch: m68k: Implement relocation

Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

# 91caa3bb 21-Aug-2023 Simon Glass <sjg@chromium.org>

event: Use an event to replace last_stage_init()

Add a new event which handles this function. Convert existing use of
the function to use the new event instead.

Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.

For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <masahiroy@kernel.org>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <masahiroy@kernel.org>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <masahiroy@kernel.org>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <masahiroy@kernel.org>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <masahiroy@kernel.org>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <masahiroy@kernel.org>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <masahiroy@kernel.org>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 0992a90d 04-May-2023 Simon Glass <sjg@chromium.org>

acpi: Create a new Kconfig for ACPI

We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.

Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.

Adjust the command to avoid a build error when ACPIGEN is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 1e48392e 07-Feb-2023 Angelo Dureghello <angelo@kernel-space.org>

arch: enable private libgcc for m68k

This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 448e2b63 16-Jan-2023 Tom Rini <trini@konsulko.com>

event: Correct dependencies on the EVENT framework

The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events")
Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# c394e8d0 30-Dec-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

Kconfig: clean up skipping low-level initialization

Put all entries for skipping low-level initialization into a sub-menu.
Use different titles for main U-Boot, SPL, TPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# e52fca22 02-Dec-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig

This converts the following to Kconfig:
CONFIG_MONITOR_IS_IN_RAM

As part of this, reword some of the documentation slightly to reflect
that this is in Kconfig and not a define now.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 14f43797 19-Dec-2022 Tom Rini <trini@konsulko.com>

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>


# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8457d023 27-Nov-2022 Tom Rini <trini@konsulko.com>

global: Remove extraneous DM_ETH imply/select

We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 68e54040 19-Nov-2022 Tom Rini <trini@konsulko.com>

sandbox: Move CONFIG_IO_TRACE to Kconfig

This is only used on sandbox, so select it there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 57b9900c 16-Nov-2022 Zong Li <zong.li@sifive.com>

riscv: use imply instead of select for SPL_SEPARATE_BSS

Use imply instead of select, then it can still be disabled by
board-specific defconfig, or be set to n manually.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 8c778f78 28-Oct-2022 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# b86986c7 18-Oct-2022 Simon Glass <sjg@chromium.org>

video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO

Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 46df0243 21-Sep-2022 Simon Glass <sjg@chromium.org>

sandbox: Convert to use driver model for SCSI

At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1bbfdc57 11-Aug-2022 Simon Glass <sjg@chromium.org>

sandbox: Avoid defining HAVE_BLOCK_DEVICE in Konfig

This is not needed as it is implied or selected by other options anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 83505a7e 31-Jul-2022 Tom Rini <trini@konsulko.com>

arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig

We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <kabel@kernel.org>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <kabel@kernel.org>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# d622b089 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp

Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 93145335 16-Jun-2022 Tom Rini <trini@konsulko.com>

nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig

The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

# c316ee67 27-Jun-2022 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location


# aec051d8 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

# a36d8672 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

# d58c0074 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Add support for run time relocation

Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com

# 10fd6d64 24-Jun-2022 Michal Simek <michal.simek@amd.com>

microblaze: Enable REMAKE_ELF

Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com

# 89e81e6c 24-Jun-2022 Michal Simek <michal.simek@amd.com>

mips: Move endianness selection to arch/Kconfig

This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com

# 0518e7a2 30-May-2022 Andrew Scull <ascull@google.com>

sandbox: Implement fuzzing engine driver

Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>

# 39f42fe2 02-May-2022 Pali Rohár <pali@kernel.org>

powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 11232139 06-Apr-2022 Tom Rini <trini@konsulko.com>

nds32: Remove the architecture

As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 1dd56db5 12-Apr-2022 Sean Anderson <sean.anderson@seco.com>

treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@amd.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@amd.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@amd.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@amd.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 01f1ab67 04-Apr-2022 Tom Rini <trini@konsulko.com>

Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>


# c6c0e56f 23-Mar-2022 Tom Rini <trini@konsulko.com>

keymile: Move sourcing of common Kconfig

The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>

# 059df562 28-Mar-2022 Philippe Reynes <philippe.reynes@softathome.com>

arch: Kconfig: imply BINMAN for SANDBOX

To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# 7fe32b34 04-Mar-2022 Simon Glass <sjg@chromium.org>

event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# dd2986ac 30-Mar-2022 Tom Rini <trini@konsulko.com>

powerpc: Fix incorrect SYS_IMMR migration values

When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marex@denx.de>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.masahiro@socionext.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# edca8cf7 31-Jan-2022 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 437992d3 01-Dec-2021 Simon Glass <sjg@chromium.org>

acpi: Use finer-grained control of ACPI-table generation

Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 27ba6289 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Tidy up use of CONFIG_ACPIGEN

This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 01537235 01-Dec-2021 Simon Glass <sjg@chromium.org>

arm: Allow supporting ACPI-table generation

Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>

# e1722fcb 01-Dec-2021 Simon Glass <sjg@chromium.org>

x86: Allow any arch to generate ACPI tables

These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.

Disable this for the tools build.

Signed-off-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# da158ec5 22-Jan-2022 Tom Rini <trini@konsulko.com>

Merge tag 'efi-2022-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc1-2

Documentation:

* describe printf() format codes

UEFI

* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048

General

* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs


# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# d3adee1d 16-Jan-2022 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: imply PARTITION_TYPE_GUID

CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# d6b318de 18-Dec-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_TIMESTAMP to Kconfig

This converts the following to Kconfig:
CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# ba1ed5b0 14-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MAP_SYSMEM

Signed-off-by: Tom Rini <trini@konsulko.com>

# be7dbb60 12-Dec-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SYS_IMMR to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 6405ab7a 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_PHYSMEM to Kconfig

This converts the following to Kconfig:
CONFIG_PHYSMEM

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>

# 93e1edff 24-Nov-2021 Simon Glass <sjg@chromium.org>

Convert CONFIG_KEYBOARD to Kconfig

This converts the following to Kconfig:
CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <anup@brainfault.org>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 6674edaa 16-Sep-2021 Tom Rini <trini@konsulko.com>

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt


# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ea2ca7e1 08-Aug-2021 Simon Glass <sjg@chromium.org>

spi: Rename SPI_SUPPORT to SPI

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2a736066 08-Aug-2021 Simon Glass <sjg@chromium.org>

serial: Rename SERIAL_SUPPORT to SERIAL

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a2ac2b96 27-Aug-2021 Tom Rini <trini@konsulko.com>

Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ab92b38a 26-Aug-2021 Tom Rini <trini@konsulko.com>

Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 3232bdf0 01-Aug-2021 Simon Glass <sjg@chromium.org>

pci: Drop DM_PCI

This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 9ca00684 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 83061dbd 10-Jul-2021 Simon Glass <sjg@chromium.org>

Rename GPIO_SUPPORT to GPIO

Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 8f969651 20-May-2021 Marek Behún <marek.behun@nic.cz>

ARM: make LTO available

Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1b457e75 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: enable LTO by default

Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 94bb891e 20-May-2021 Marek Behún <marek.behun@nic.cz>

sandbox: make LTO available

Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 95300f20 04-May-2021 Kory Maincent <kory.maincent@bootlin.com>

pytest: add sandbox test for "extension" command

This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 57c675d6 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

sandbox: enable IRQ using select for sandbox architecture

Enable IRQ using select for sandbox architecture.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 543d091e 08-Mar-2021 Wasim Khan <wasim.khan@nxp.com>

arch: Kconfig: enable IRQ using select for x86 architecture

use 'select' to enable IRQ as it does not have architecture
specific dependency.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# ff98da06 14-Mar-2021 Claudiu Manoil <claudiu.manoil@nxp.com>

sandbox: Add a DSA sandbox driver and unit test

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.

The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:

=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.

I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 7c591a84 14-Feb-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

sandbox: imply SCP03 and CMD_SCP03

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 22ad69b7 06-Nov-2020 Tom Rini <trini@konsulko.com>

Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>

# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>

# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>

# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>

# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>

# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# f30f268a 09-May-2019 Tom Rini <trini@konsulko.com>

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 0b2fa98a 16-Dec-2020 Simon Glass <sjg@chromium.org>

linker_lists: Fix alignment issue

The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

ll_entry_declare(struct driver, fred, driver)

...

void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6ca5ff3f 11-Nov-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

test: unit test for exception command

Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 51bb3384 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Support string substitution in bootargs

In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>


# f158ba15 05-Nov-2020 Simon Glass <sjg@chromium.org>

bootm: Add tests for fixup_silent_linux()

This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b1ad4157 27-Oct-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: enable poweroff command

The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.

Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 839d66cd 05-Nov-2020 Simon Glass <sjg@chromium.org>

x86: Provide default SMBIOS manufacturer/product

Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 35b7ca76 04-Nov-2020 Michal Simek <michal.simek@xilinx.com>

arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 7b56432c 19-Aug-2020 Michal Simek <michal.simek@xilinx.com>

arc: Kconfig: Add missing DM dependency

ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a4aa1889 24-Jul-2020 Ovidiu Panait <ovidiu.panait@windriver.com>

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 4a4830cf 01-Jul-2020 John Chau <john@harmon.hk>

cmd: add clone command

This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# bcd4e6f3 19-Jul-2020 Simon Glass <sjg@chromium.org>

x86: Change how selection of ROMs works

Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# d40d2c57 16-Jul-2020 Simon Glass <sjg@chromium.org>

acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# efc06448 22-May-2020 Michael Walle <michael@walle.cc>

sandbox: move compression option to Kconfig

CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them
by CONFIG_SANDBOX instead of setting them in configs/sandbox.h.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1c0bc80a 13-Mar-2020 Heinrich Schuchardt <xypron.glpk@gmx.de>

sandbox: implement ft_board_setup()

Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# e556d3d6 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 69b1e9f4 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it
reduces the available code-size saves. Also, SPI flash is seldom needed
in TPL.

Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 79d66a6a 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 3b65ee34 06-Dec-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 8c2c4635 31-Aug-2019 Marek Vasut <marek.vasut+renesas@gmail.com>

sh: r2dplus: Enable OF control

Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>


# 8c59f202 21-Aug-2019 Lukas Auer <lukas.auer@aisec.fraunhofer.de>

riscv: add SPL support

U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>


# b8050511 16-May-2019 Urja Rannikko <urjaman@gmail.com>

sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass

This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>


# c3d9f3f8 12-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

test: dm: add a test for MDIO MUX DM uclass

Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# ec9594a5 03-Jun-2019 Alex Marginean <alexm.osslist@gmail.com>

test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# bb413337 27-Apr-2019 Ramon Fried <ramon.fried@gmail.com>

pci_ep: add pci endpoint sandbox driver

Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a4298dda 29-May-2019 Tom Rini <trini@konsulko.com>

Kconfig: Add SPI / SPI_FLASH as dependencies

In order to use CMD_SF / CMD_SPI / ENV_IS_IN_SPI_FLASH we need to have
the SPI (or SPI_FLASH/DM_SPI_FLASH, for CMD_SF) enabled. Express this
in the Kconfigs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>


# abe0f879 13-Mar-2019 Angelo Dureghello <angelo@sysam.it>

m68k: add OF control support to m68k

Add SUPPORT_OF_CONTROL at this stage, to avoid to break build
bisectability.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# 09259fce 02-Apr-2019 Kever Yang <kever.yang@rock-chips.com>

sysreset: enable driver support in SPL/TPL

SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 31d5261d 02-May-2019 Simon Glass <sjg@chromium.org>

x86: Enable the RTC on all boards

With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 98987902 25-Apr-2019 Simon Glass <sjg@chromium.org>

x86: Support SPL and TPL

At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# add49671 22-Apr-2019 Vignesh Raghavendra <vigneshr@ti.com>

arch: armv8: Provide a way to disable cache maintenance ops

On AM654 SoC(arm64) which is IO coherent and has L3 Cache, cache
maintenance operations being done to support non-coherent platforms
causes issues.

For example, here is how U-Boot prepares/handles a buffer to receive
data from a device (DMA Write). This may vary slightly depending on the
driver framework:

Start DMA to write to destination buffer
Wait for DMA to be done (dma_receive()/dma_memcpy())
Invalidate destination buffer (invalidate_dcache_range())
Read from destination buffer

The invalidate after the DMA is needed in order to read latest data from
memory that’s updated by DMA write. Also, in case random prefetch has
pulled in buffer data during the “wait for DMA” before the DMA has
written to it. This works well for non-coherent architectures.

In case of coherent architecture with L3 cache, DMA write would directly
update L3 cache contents (assuming cacheline is present in L3) without
updating the DDR memory. So invalidate after “wait for DMA” in above
sequence would discard latest data and read will cause stale data to be
fetched from DDR. Therefore invalidate after “wait for DMA” is not
always correct on coherent architecture.

Therefore, provide a Kconfig option to disable cache maintenance ops on
coherent architectures. This has added benefit of improving the
performance of DMA transfers as we no longer need to invalidate/flush
individual cache lines(especially for buffer thats several KBs in size).

In order to facilitate use of same Kconfig across different
architecture, I have added the symbol to top level arch/Kconfig file.
Patch currently disables cache maintenance ops for arm64 only.
flush_dcache_all() and invalidate_dcache_all() are exclusively used
during enabling/disabling dcache and hence are not disabled.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>


# 7c8d210b 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

riscv: Enable create symlink using kconfig

We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# c882163b 16-Feb-2019 Simon Glass <sjg@chromium.org>

x86: sandbox: pch: Add a CONFIG option for PCH

At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 2a049572 10-Dec-2018 Simon Glass <sjg@chromium.org>

dm: sound: Create an option to use driver model for sound

The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 919e7a8f 15-Nov-2018 Simon Glass <sjg@chromium.org>

test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>

# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>

# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>

# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>

# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>

# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>

# c2774e61 22-May-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-nds32


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>

# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>

# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>

# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>

# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>

# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>

# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>

# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>

# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>

# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>

# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>

# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>

# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>

# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>

# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>

# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>

# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>

# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>

# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>

# 4f89d494 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

test: dm: virtio: Add test cases for virtio uclass

Now that we have a sandbox virtio transport driver, add some test
cases to test virtio uclass driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 3bf9a8e8 15-Oct-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Implement arch-specific io accessor routines

At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.

Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.

These are ported from Linux kernel lib/iomap.c, with slight changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 0a60a81b 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>


# fe39e8e0 25-Sep-2018 Jens Wiklander <jens.wiklander@linaro.org>

sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>


# cd1f45c2 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>


# bf6cc82c 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>


# 117a433d 26-Sep-2018 Bin Meng <bmeng.cn@gmail.com>

riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>


# 31b8217e 19-Sep-2018 Rajan Vaja <rajan.vaja@xilinx.com>

dm: test: Add "/firmware" node scan test

Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>


# 0f1caa98 03-Aug-2018 Bin Meng <bmeng.cn@gmail.com>

sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 08a00cba 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

dm: Change CMD_DM enabling

CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>


# 5ed063d1 23-Jul-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: Sort bool, default, select and imply options

Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>


# b37b7b20 19-Jul-2018 Bin Meng <bmeng.cn@gmail.com>

x86: Switch to use DM sysreset driver

This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>


# f1b1f770 15-Apr-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>


# 1811a928 05-Feb-2018 Adam Ford <aford173@gmail.com>

Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig

config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>


# 405fc830 22-Jan-2018 Derald D. Woods <woods.technical@gmail.com>

Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>


# 068feb9b 25-Dec-2017 Rick Chen <rick@andestech.com>

riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>


# f58ad98a 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate USB Ethernet adapters to Kconfig

This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# ae358449 28-Aug-2017 Chris Packham <judge.packham@gmail.com>

usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig

CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# c11b17c6 16-Aug-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply CMD_PCI

Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>


# e7a815f3 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_ZBOOT to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_ZBOOT

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>


# 719d36ee 04-Aug-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SF_TEST to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SF_TEST

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>


# 24357dfd 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: Switch all boards to use DM SCSI

After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# b7c6baef 30-Jul-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# b9342b2c 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Move USB to platform Kconfig

Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4f0faacb 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Imply DM uclass drivers

Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 263252c7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select OF_CONTROL

This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 6bf89de7 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select PCI and DM_PCI

PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# e28497bf 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select USE_PRIVATE_LIBGCC

x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 0ce9c576 30-Jul-2017 Bin Meng <bmeng.cn@gmail.com>

x86: kconfig: Select TIMER and X86_TSC_TIMER

Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 611dbb7f 04-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

arch/x86: Select USB before selecting host driver

Kbuild complains if USB is not selected before any of host driver.

warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)

Select it for X86.

Fixes: 64d6ac5bc4a9 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# d56b4b19 22-Jul-2017 Tom Rini <trini@konsulko.com>

configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS

The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.

Signed-off-by: Tom Rini <trini@konsulko.com>


# 3bf926c0 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_SATA to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_SATA

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# fedb428c 14-Jun-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# daab59ac 05-Jul-2017 Andy Shevchenko <andriy.shevchenko@linux.intel.com>

avr32: Retire AVR32 for good

AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>


# da2364cc 26-Jun-2017 Bin Meng <bmeng.cn@gmail.com>

Revert "x86: Convert MMC to driver model"

This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 91d27a17 02-Jun-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>


# 221a949e 19-May-2017 Daniel Thompson <daniel.thompson@linaro.org>

Kconfig: Finish migration of hashing commands

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>


# ded48cdc 17-May-2017 Simon Glass <sjg@chromium.org>

sandbox: Enable CMD_GETTIME

Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>


# ee7c0e71 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_LZMADEC to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>


# aed998aa 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_LZMA to Kconfig

This converts the following to Kconfig:
CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>


# 1b330894 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IRQ to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>


# 7d0f5c13 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IOTRACE to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>


# 594e8d1c 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_IO to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>


# 551c3934 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_HASH to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>


# d91a9d7f 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_GETTIME to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_GETTIME

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>


# fe7604a3 17-May-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_CMD_FPGA_LOADBP et al to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP

Signed-off-by: Simon Glass <sjg@chromium.org>


# 86132af7 17-Apr-2017 rick <rick@andestech.com>

nds32: Support AG101P serial DM.

Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>


# ddb3ac3c 09-Apr-2017 Simon Glass <sjg@chromium.org>

x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>


# 64d6ac5b 12-May-2017 Tom Rini <trini@konsulko.com>

Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>


# 70cc0c34 14-Mar-2017 Tom Rini <trini@konsulko.com>

OpenRISC: Remove

The OpenRISC architecture is currently unmaintained, remove.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 936478e7 14-Mar-2017 Tom Rini <trini@konsulko.com>

SPARC: Remove

The SPARC architecture is currently unmaintained, remove.

Cc: Francois Retief <fgretief@spaceteq.co.za>
Signed-off-by: Tom Rini <trini@konsulko.com>


# ea3310e8 14-Mar-2017 Tom Rini <trini@konsulko.com>

Blackfin: Remove

The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>


# 1c694102 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 3daa7c7b 21-Mar-2017 Vlad Zakharov <vzakhar@synopsys.com>

arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 4585601a 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_MISC_INIT to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>


# a421192f 23-Jan-2017 Simon Glass <sjg@chromium.org>

Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>


# e5ec4815 22-Jan-2017 Tom Rini <trini@konsulko.com>

Kconfig: Migrate BOARD_LATE_INIT to a select

This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)


# 558e1257 08-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

sandbox, x86: select DM_KEYBOARD instead of default y entry

Once we migrate to DM-based drivers, we cannot go back to legacy
ones, i.e. config options like DM_* are not user-configurable.

Make SANDBOX and X86 select DM_KEYBOARD like other platforms do.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# c978b524 10-Aug-2016 Chris Zankel <chris@zankel.net>

xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>


# 9a387128 27-Jun-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

linux/io.h: add generic ioremap()/iounmap() defines

For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>


# 9a46bd3f 12-Jun-2016 Simon Glass <sjg@chromium.org>

dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS

Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 2507854e 14-May-2016 Simon Glass <sjg@chromium.org>

Drop HAVE_GENERIC_BOARD and SYS_GENERIC_BOARD options

These are no longer used. The migration is complete. Drop these options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Andreas Bießmann <andreas@biessmann.org>


# 0fc13a90 19-Dec-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

MIPS: add initial infrastructure for device-tree files

Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>


# 6463fd8f 06-Dec-2015 angelo@sysam.it <angelo@sysam.it>

m68k: add private libgcc

Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>


# e17c5200 28-Oct-2015 Francois Retief <fgretief@spaceteq.co.za>

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>


# 09f3ca3d 20-Oct-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

arm, powerpc: select SYS_GENERIC_BOARD

We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>


# bcae80e9 21-Oct-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: convert nios2 cpu to driver model

Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>


# a03377b6 03-Sep-2015 Thomas Chou <thomas@wytron.com.tw>

nios2: permit device tree control of U-Boot

Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>


# 2e88bb28 24-Aug-2015 Kun-Hua Huang <kunhua@andestech.com>

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>


# a350c6a6 15-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86

The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.

Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded symbolic
links.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 64b77ed2 03-Jul-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: disable HAVE_PRIVATE_LIBGCC for ARM64

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>


# 2ce6ecac 11-Jun-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

avr32: move CONFIG_SYS_GENERIC_BOARD to Kconfig

Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>


# 3e452227 27-Apr-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>


# 58d423b8 30-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

dm: select CONFIG_DM* options

As mentioned in the previous commit, adding default values in each
Kconfig causes problems because it does not co-exist with the
"depends on" syntax. (Please note this is not a bug of Kconfig.)
We should not do so unless we have a special reason. Actually,
for CONFIG_DM*, we have no good reason to do so.

Generally, CONFIG_DM is not a user-configurable option. Once we
convert a driver into Driver Model, the board only works with Driver
Model, i.e. CONFIG_DM must be always enabled for that board.
So, using "select DM" is more suitable rather than allowing users to
modify it. Another good thing is, Kconfig warns unmet dependencies
for "select" syntax, so we easily notice bugs.

Actually, CONFIG_DM and other related options have been added
without consistency: some into arch/*/Kconfig, some into
board/*/Kconfig, and some into configs/*_defconfig.

This commit prefers "select" and cleans up the following issues.

[1] Never use "CONFIG_DM=n" in defconfig files

It is really rare to add "CONFIG_FOO=n" to disable CONFIG options.
It is more common to use "# CONFIG_FOO is not set". But here, we
do not even have to do it.
Less than half of OMAP3 boards have been converted to Driver Model.
Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is
weird. Instead, add "select DM" only to appropriate boards, which
eventually eliminates "CONFIG_DM=n", etc.

[2] Delete redundant CONFIGs

Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again
in configs/sandbox_defconfig.
Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and
defines it also in omap3_beagle_defconfig and devkit8000_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>


# 01496c4f 17-Mar-2015 Alexey Brodkin <abrodkin@synopsys.com>

serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>


# 0a9e7ee5 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: select SYS_GENERIC_BOARD for some architectures

We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>


# 0a12e687 19-Mar-2015 Masahiro Yamada <yamada.masahiro@socionext.com>

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>


# c1c61573 07-Feb-2015 Simon Glass <sjg@chromium.org>

powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL)

Enable this in the Kconfig so that PowerPC boards can use device tree to
configure U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>


# a67ef280 03-Feb-2015 Alexey Brodkin <abrodkin@synopsys.com>

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>


# 45ccec8f 23-Oct-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig

The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.

Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>


# 783e6a72 22-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>


# 3174e4e8 13-Sep-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add CONFIG_SYS_{ARCH, CPU, ...} type def to arch/Kconfig

This commit adds the type definitions (+ help messages) of
CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} to arch/Kconfig,
which would save lots of type defs for taget boards.
(See also the next commit.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>


# 51631259 29-Jul-2014 Masahiro Yamada <yamada.m@jp.panasonic.com>

kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>